Normal Computing today announced the tape-out of CN101, a thermodynamic computing ASIC that the company calls the first of its kind. The chip targets AI and HPC in modern data centers and reflects Normal's Carnot architecture, which uses physical dynamics such as thermal fluctuations, controlled dissipation, and stochastic transitions to compute. Normal claims CN101 can deliver up to 1,000x better energy efficiency on specific matrix and sampling workloads than conventional accelerators. The tape-out moves the project into silicon characterization and benchmarking, where engineers will measure sampling convergence, metastability lifetimes, and mixing times to validate the claims. Normal plans include CN201 for 2026 and CN301 for 2028, to scale higher-resolution diffusion and video models. Executives envision heterogeneous racks combining CPUs, GPUs, and physics-based ASICs so each problem runs on the most suitable substrate.

Thermodynamic computing replaces standard Boolean logic with many interconnected analog elements that start in semi-random states and settle into an equilibrium that encodes a solution. CN101 links these elements and runs a lattice random walk sampler to steer the system toward useful distributions. Instead of fighting noise, the chip uses randomness to perform tasks like Bayesian inference, probabilistic simulation, and diffusion sampling. Engineers will measure how quickly the device reaches equilibrium, how long useful metastable states last, and how accurately it samples the target distribution, as these factors determine the speed and energy cost. Early tests will also check stability across different temperatures and manufacturing variations. If the results hold up, thermodynamic ASICs could give data centers a more energy-efficient way to scale AI as conventional silicon approaches its known limits.

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